Status of the miniSpartan3

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This topic contains 32 replies, has 9 voices, and was last updated by  alepar 4 years, 3 months ago.

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    I played with this a bit more tonight, and modified Hamsterworks’ DVID test to run on the miniSpartan3. There are a lot of differences between the Spartan-3A and the Spartan-6, so rather than trying to modify his miniSpartan6+ version, I rolled back to his original ( ), which used the ODDR2 outputs (supported by the Spartan-3A), rather than the OSERDES2 outputs.

    It needs a clock at the pixel clock, and one at 5x the pixel clock (and an inverted 5x clock). To generate them I’m using two DCMs… basically one to generate the pixel clock x5, and the second to divide by 5 (though they all actually come out of the second DCM to keep things nice). I based the clocking code off of: .

    It’s currently set to 800×600 (~40MHz pixel clock), and I tested it at 640×480, 720×480, 800×480, and 800×600. It didn’t meet timing at 1024×768 (~65MHz pixel clock), though I didn’t put any effort into trying to make it work, so it might be possible. I haven’t really spent much time with it, and only used it on one monitor… so it may be buggy, might not work on all monitors, etc. Anyway, it’s attached to this post if anyone would like to check it out (settings for other resolutions are commented in dvid_test.vhd and clocking.vhd). Again, the bitfile is for the XC3S200A (but the project should build for the XC3S50A).

    I really think that someone from Scarab Hardware should upload any file/documentation about the miniSpartan3. Just a simple schematic is going to be appreciated a lot.

    I haven’t seen where they said they were gonna make this board open source, so even if it’s not a full schematic, at LEAST upload the necessary pin mappings to use the board. It’s such a simple board though, I don’t see why they wouldn’t just post the full schematic… there’s nothing special about the FT2232D circuit, and the rest are all things meant to be used as part of the board, which would need documentation (ADC, XO, HDMI connector, I/O pins, etc). It seems pretty crazy to have to reverse engineer a dev board.

    I hope that it’s coming soon, and that I’m just one of the first to receive a board, so they haven’t gotten all the documentation and stuff ready to go yet.

    Has anyone else gotten a miniSpartan3 yet? It says that there are 34 in stock… when I first saw them in stock, it said 39. I’m guessing there were around 50 built, with ~11 pre-orders, and 5 new orders?

    I really hope that you’ll have great success with your board.

    Thanks! So far, so good… :)


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    We published the schematic and the pinout on Github. Sorry about this delay, we were reorganizing the schematic to make sure it will be helpful for everyone.

    Yes you are correct the correct part should be AT45.It was a mistake in the manufacturing, not all the boards have the wrong Flash chip. We are checking this right now. But it seems that happened when we change the schematic and we are using the other flash chip with miniSpartan6+.
    We will post an update about that soon.


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    Awesome… thanks! That’s much appreciated.




    Schematic looks good. I’ll be buying one. I hope to get the one with the right flash chip.



    Hi folks I just received my Minispartan3’s (50A and 200A) and my minispartan6+(lx9 and LX25). Both my 3 boards have the MX25.

    I also have a question about powering the boards. Can the boards be powered by USB and another power source at the same time? Normal operation will be to have the scarab powered by another system but when I want to reprogram it I don’t want to have to detach it from that system to plug it into the USB port. That is a question for both the 3 and the 6



    I also have a question about powering the boards. Can the boards be powered by USB and another power source at the same time? Normal operation will be to have the scarab powered by another system but when I want to reprogram it I don’t want to have to detach it from that system to plug it into the USB port. That is a question for both the 3 and the 6

    Without modifications on either board it’s not a good idea, and probably wouldn’t work.

    The input to the voltage regulators on both are connected directly to the USB port power pin, so plugging it into USB and an external power supply would end up supplying voltage to your computer’s USB host port (not supposed to do that). You’d want to at least disconnect the +5V from the USB port to prevent that (lift the power pin on the USB connector, cut the power wire in the USB cable, etc).

    Once you do that, you should be safe from damage, but the FTDI chips need a way to know that you’ve plugged in. Typically you signal that by connecting a couple resistors from the USB power pin to one of the pins on the FTDI chip (/RESET on the FT2232D and BCBUS7 on the FT2232H). On the miniSpartan3, /RESET is tied high, so you’d need to lift that pin from the board and connect the two resistors. On the miniSpartan6+, BCBUS7 is left disconnected, so you’d need to add the two resistors and connect to that pin.

    So, you’d most likely want to lift the USB connector power pin (to use as the cable detection), rather than cutting the power wire in the USB cable. You may also be able to connect a manual switch, or FPGA I/O to toggle the USB detection pin, rather than using the USB power pin.

    You can see the specifics of the bus and self powered configurations in section 6 of the FT2232H and FT2232D datasheets.




    Since I have more control over the 5V connection from my system perhaps it might be better to use something there to control the 5v coming from my system to the scarb?

    • This reply was modified 4 years, 5 months ago by  a2retro.


    Yeah, if you put in a way of cutting power from your main system to the miniSpartan board(s) (transistor, switch, etc), that should work.




    Another soul with wrong flash chip here.
    I replaced it with the part that DogP suggested above. Now, xc3sprog recognizes the flash, but verification step fails (see below).
    As I’m kinda noobish with fpgas, don’t really know where to start looking. Bad bscan bit that I synthesized myself? Could anyone share a good bscan bit that they have had luck with?

    $ xc3sprog -c ftdi -I led_test.bit
    XC3SPROG (c) 2004-2011 xc3sprog project $Rev: 774 $ OS: Linux
    Free software: If you contribute nothing, expect nothing!
    Feedback on success/failure/enhancement requests: 
    Check Sourceforge for updates:
    Using Libftdi, 
    JEDEC: 1f 24 0x00 0x01
    status: 88
    Found Atmel Device, Device ID 0x2400: AT45DB041
    Unique number:
    164 bytes/page, 2048 pages = 335872 bytes total 
    Verify failed  at flash_page      2
    Verify failed  at flash_page      3
    Verify failed  at flash_page      6
    Verify failed  at flash_page      9
    Verify failed  at flash_page     10
    Verify failed  at flash_page     11

    Ahmad Abbas

    Hi @alepar,

    Yes I saw this problem before. Their is a bug in xc3sprog. In the progalgspiflash.cpp file, the struct for AT45DB is:

    truct at45_t
        unsigned int id;
        int pgsize;
        int alt_pagesize;
        int pages;
        int pages_per_sector;
        char chipname[12];
    int ProgAlgSPIFlash::spi_flashinfo_at45(unsigned char *buf) 
      byte fbuf[128];
      int idx;
    #define  NUM_AT45  7
      struct at45_t at45chips[NUM_AT45] =
              {    3,  264,  256,  512, 128, "AT45DB011"},
              {    7,  164,  256, 2048, 256, "AT45DB041"},
              {    9,  264,  256, 4096, 256, "AT45DB801"},
              { 0x0b,  528,  512, 4096, 256, "AT45DB161"},
              { 0x0d,  528,  512, 8192, 256, "AT45DB321"},
              { 0x0f, 1056, 1024, 8192, 256, "AT45DB641"},
              { 0xff,    0,    0,    0,   0, "UNKNOWN"  }

    The 164 which the page size is wrong, it should be 264. That’s why you can read the ID but when you can’t write the bit file.
    I tried that last week and it works.

    The bscan file that comes with xc3sprog is correct.


    • This reply was modified 4 years, 3 months ago by  Ahmad Abbas.


    Perfect, this works! Thanks so much!



    Ah… cool, glad you guys got this working! I haven’t gotten around to trying it yet.




    Is there anything special you need to do in order to get the flash chip to work? I’ve soldered a new EEPROM chip on, and xc3sprog on linux still doesn’t recognize it, there is still only one JTAG location.



    Not really. You just flash bscan bit first, then flash -I bit you want on eeprom.



    Sorry, what is bscan bit? The way I have been loading bitstreams onto my FPGA is by using a command such as sudo xc3sprog -c ftdi top.bit. Are you saying there’s something else I need to flash first? I thought that when I ran xc3sprog -c ftdi to view all possible flash targets, it would list two JTAG locations and I would choose one or the other via the -p option to xc3sprog, but so far nothing has changed.

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